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PIC, Wafer, & Co-Packaged Optics

As optical technologies supersede energy-intensive copper communication links, the rise of high-speed and high-channel-count devices is gathering pace to support the explosive growth in AI, machine learning and high-performance computing.

It’s critical that test and measurement instrumentation adapts to meet these rapidly changing requirements.

Silicon photonics, PIC and CPO adoption is gathering speed

New devices such as Broadcom’s 51.2T switch with eight 64 channel silicon photonic engines, and Intel’s Optical Compute Interconnect (OCI) 4 Tbps bidirectional chiplet with 64 lanes over 8 fiber pairs, present new challenges to the test engineer.

Source: Broadcom
Source: Intel

The challenge for test engineers

Scalable, integrated test systems that are capable efficiently testing devices with dozens or hundreds of channels are required. They must consider the product life-cycle, from R&D, to validation/characterization, to high-volume manufacturing, as well as each stage of the production process from wafer to packaged module. Each stage may involve distinct measurements, standards and equipment.

Close collaboration across industry is required to ensure all parts of the ecosystem are able to scale sufficiently to support the roll out of new technologies.

Our product architecture enables efficient testing of next-generation processors (GPUs/CPUs/ASICs), network switches, and optical transceivers used by hyperscalers and network operators to support the explosive growth in AI, machine learning and high-performance computing.

Test solution examples

Learn more

ON-DEMAND WEBINAR

Integrated Photonics for the AI Revolution – An Ecosystem Perspective

Artificial Intelligence and High-Performance Computing are accelerating the demand for next-generation optical interconnects, with photonic integrated circuits (PICs) as one of the key enablers of this (r)evolution. These wafer-based technologies are ideal for high channel count and high-density optical interconnects such as In-Package Optical I/O and Co-Packaged Optics but have unique challenges.


ON-DEMAND WEBINAR

Disaggregation and Optical Interconnect in AI/HPC Networks

Artificial intelligence is taking our industry and the world by storm and astute companies have been planning ahead for this rapid technology transition.

Hear from industry leaders at NVIDIA, Microsoft, GlobalFoundries, Hyperion Research, Ayar Labs as they provide perspectives from across the ecosystem, and discuss the latest technology advances in readiness for the wave of AI and high-performance computing networks. Kees Propstra, VP Marketing and GM of Quantifi Photonics USA, will provide his perspective on test and measurement solutions that are needed support this new wave of interconnect technology.


ON-DEMAND WEBINAR

Challenges and Strategies for High-Volume Manufacturing and Testing of Co-Packaged Optics

Artificial intelligence is taking our industry and the world by storm and astute companies have been planning ahead for this rapid technology transition.

Hear from industry leaders at NVIDIA, Microsoft, GlobalFoundries, Hyperion Research, Ayar Labs as they provide perspectives from across the ecosystem, and discuss the latest technology advances in readiness for the wave of AI and high-performance computing networks. Kees Propstra, VP Marketing and GM of Quantifi Photonics USA, will provide his perspective on test and measurement solutions that are needed support this new wave of interconnect technology.


WHITE PAPER

Testing Strategies for Next-Generation Optical Interconnects: Co-Packaged Optics & Integrated Photonics

This white paper discusses industry trends in integrated photonics and how market participants are adapting to test and mass produce next-generation optical interconnects in a cost-effective manner. The traditional semi-conductor ecosystem is the example for the industry and parallels can be made with the current evolution of the integrated photonics ecosystem.


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